Hardware Execution Model
Heterogeneous SoC Substrate
Protoplatz is implemented on high-performance heterogeneous SoC architectures (TI AM69A (J784S4)) designed for mixed-criticality industrial workloads. The execution model is defined by strict hardware-enforced isolation between application and real-time domains.
Compute Cluster Allocation
- Cortex-A72 Clusters: High-level system management, ProtoAccess intelligence execution, and external API handling.
- Cortex-R5F Clusters: Real-time protocol timing, deterministic scheduling, and low-latency control paths.
- Cortex-M4F: Dedicated system safety and power management.
- C7x DSP + MMA: Hardware acceleration for ProtoAccess AI inference and signal processing.
Hardware-Enforced Isolation
The system utilizes a multi-layered hardware firewall to isolate memory regions and peripheral access between execution domains. This ensures that a failure or pre-emption in the application layer cannot affect the timing accuracy of the protocol stacks running on the R5F cores.
Mixed-Criticality Execution
Execution domains are fixed at boot time and are not reconfigurable at runtime. This deterministic scheduling ensures that time-critical protocol termination remains protected from variable application workloads.
Memory & Bus Governance
Memory allocation is static, with dedicated regions for protocol hardware buffers. All bus traffic is monitored by the hardware governance engine to prevent unauthorized cross-domain access.